Assembler Syntaxes
Introduction
To process information in a given way, computers speak their own language of binary numbers. To ease this communication between machine and human, we have created mnemonics to these instructions. Before given to the machine, these mnemonic instructions are given translated to the language of the computer’s to process information.
This page is an homage to the various assembler syntaxes.
Last Updated: 2022-06-20
Table of Content
- Intel Syntax
- Netwide Assembler Syntax
- AT&T Syntax
- Ideal Turbo Assembler Syntax
- High Level Assembler Syntax
- ARM Syntax
- RISC-V Syntax
Intel Syntax
| Year | 1978 |
| Destination | Left |
| Platform | x86 |
| Author | Intel |
Introduced alongside the 8086 processor, this is among the most used assembler syntax out there, likely thanks to the popularity of the x86 instruction set architecture.
The Macro Assembler, also known as Microsoft Assembler, or MASM, takes from the same syntax, and is still a widely used assembler.
Components
| Component | Note | Example |
| Immediate | As-is. | 0x30 |
| Register | As-is. | rax |
| Memory | Width specifier outside square brackets with “ptr” postfixed. Widths being byte, word, dword, qword, xmmword, ymmword, and zmmword. | byte ptr [edx] |
| Scaled memory | As described in the Intel reference manual. | word ptr [eax+ecx*4+0x100] |
| Segment register | After memory width specifier and outside memory reference. | dword ptr es:[eax+0x100] |
| Prefixes | Before the mnemonic, separated by a space. | repe stos |
Example
; x86 (i386 and later) mov edx, dword ptr ss:[eax+ecx*2-0x20]
Netwide Assembler Syntax
| Year | 1996 |
| Destination | Left |
| Platform | x86 |
| Author | NASM developers |
The Netwide Assembler/Disassembler, also known as NASM, is one of the most popular assemblers for the Linux operating system.
It features a variant of the Intel syntax. For example, placing the segment register within the brackets.
Components
| Component | Note | Example |
| Immediate | As-is. | 0x30 |
| Register | As-is. | rax |
| Memory | Width specifier outside square brackets. Widths being byte, word, dword, qword, oword, yword, and zword. | byte [edx] |
| Scaled memory | Same as Intel. | word [eax+ecx*4+0x100] |
| Segment register | After memory width specifier and inside memory reference. | dword [es:eax+0x100] |
| Prefixes | Before the mnemonic. | repe stob |
Example
; x86 (i386 and later) mov edx, dword [ss:eax+ecx*2-0x20]
AT&T Syntax
| Year | 1960s |
| Destination | Right |
| Platform | PDP-11 |
| Author | AT&T |
The Unix operating system, being developed at AT&T Bell Labs, before being rewritten in the C programming language, was originally written in assembly, presumably using the AT&T Assembler and their own syntax.
The PDP and VAX minicomputers became a success, and with it the syntax became popular. The earliest form of documentation for this syntax was with the introduction of the IAS/RSX-11 MACRO-11 Reference Manual in 1975 from the Digital Equipment Corporation (DEC).
The GNU C Compiler and the as(1) assembler eventually saw support for the x86 in the mid-90s.
Components
| Component | Note | Example |
| Immediate | Prefixed with a $ (dollar sign) character. |
$0x30 |
| Register | Prefixed with a % (percent) character. |
%rax |
| Memory | Parentheses. Widths may be appended to the mnemonic with characters ‘b’ (byte), ‘w’ (word), ‘d’ (dword), or ‘q’ (qword) for the memory operation width. | (%edx) |
| Scaled memory | Parentheses, comma separated to denote base register, index register, and scale. | 0x100(%eax,%ecx,4) |
| Segment register | Before memory offset. | %es:0x100(%eax) |
| Prefixes | Before the mnemonic. | repe stob |
Example
; x86 (i386 and later) mov %ss:-0x20(%eax,%ecx,2), %edx
Ideal Turbo Assembler Syntax
| Year | 1989 |
| Destination | Left |
| Platform | x86 |
| Author | Bordland |
The Bordland Ideal Turbo Assembler, also known as TASM, was an assembler for the MS-DOS operating system.
While the default operation mode was in the MASM-compatible mode, the ideal mode, also known as TASM enhenced mode, brought a few enhancements to its syntax.
Components
| Component | Note | Example |
| Immediate | As-is. | 0x30 |
| Register | As-is. | rax |
| Memory | Width specifier inside square brackets. Widths are the same as Intel’s. | [byte edx] |
| Scaled memory | Same as Intel. | [word eax+ecx*4+0x100] |
| Segment register | After memory width specifier and inside memory reference. | [dword es:eax+x100] |
| Prefixes | Before the mnemonic. | repe stob |
Example
; x86 (i386 and later) mov edx, [dword ss:eax+ecx*2-0x20]
High Level Assembler Syntax
| Year | 1999 |
| Destination | Right |
| Platform | x86 |
| Author | Randall Hyde |
Randall Hyde made the High Level Assembler to help others learn assembly faster.
The Ollydbg debugger, when disassembling, mistreats the segment register akin to the Intel syntax: MOV ([TYPE DWORD SS:EAX+ECX*2-0x20],EDX). There are no references in the manual for this alternative syntax.
Components
| Component | Note | Example |
| Immediate | As-is. | 0x30 |
| Register | As-is. | rax |
| Memory | Width specifier inside square brackets and after the keyword type. |
[type byte edx] |
| Scaled memory | Same as Intel. | [type word eax+ecx*4+0x100] |
| Segment register | Before mnemonic and prefixes, first character of the register and seg: suffixed. |
fseg: |
| Prefixes | Before the mnemonic, separated with a . (dot) character. |
repe.stob |
Example
; x86 (i386 and later) sseg: mov ([type dword eax+ecx*2-0x20], edx)
ARM Syntax
| Year | 1985 |
| Destination | Left |
| Platform | Arm |
| Author | Arm Limited |
This is the native assembly syntax for arm systems.
Components
TODO
Example
ldr r0, [r1]
RISC-V Syntax
| Year | 2010 |
| Destination | Left |
| Platform | RISC-V |
| Author | University of California, Berkeley |
This is the native assembly syntax for RISC-V systems.
Components
TODO
Example
lw x13, 0(x13)